DDR的读写都是64字节为单位的： 开ECC的时候，小于64BYTE写的话，就需要读出来补齐到64BYTE，然后计算ECC校验值，再写入ECC校验区的8BYTE，再写入数据区的64BYTE；
不开ECC DDR可以mask write，开ECC只能发RMW 【Read-Modify-Write】
https://zhuanlan.zhihu.com/p/586977359
Mask Write operation
The LPDDR5 SDRAM requires that Write operations which include a byte mask anywhere in the burst sequence must use the Masked Write command. This allows the SDRAM to implement efficient data protection schemes based on larger data blocks. The Masked Write command to the same banks in same bank-group in BG mode or the same banks in 8B/16B mode cannot be issued until tCCDMW later, to allow the LPDDR5-SDRAM to finish the internal Read-Modify-Write. One Data Mask-Invert (DMI) pin is provided per byte lane, and the Data Mask-Invert timings match data bit (DQ) timing. See 7.4.10 for more information on the use of the DMI signal. Please refer to Section 8 for command timing constraints for each bank architecture timing. Table 226 is a description of tCCDMW following CKR and Bank mode.
LPDDR5 中的写命令除了normal write operation，还有mask write operation。所谓mask write，即为选择性的写某些byte，其它byte不写到颗粒中。类似于AXI中的wstrb，ddr中一般用DM信号来进行write mask。在LPDDR5中，DM变成了DMI，但在mask write命令中和DM中的作用是一样的，都是用来进行某些特定byte的写入颗粒。
mask write的最小粒度是byte，因为DMI信号是两bit，分别对应DQ的高位byte和低位byte。
normal write到mask write也有一个时间约束，即tCCDMW。
mask write还有一个重要特征，不支持BL32的mask write，只支持BL16的mask write。因此如果有BL32的mask write需求，需要将该命令拆成两笔BL16的mask write。
https://www.intel.cn/content/www/cn/zh/docs/programmable/683353/20-1/read-modify-write-memory.html