imxrt1052 flexram配置
发布时间 2023-07-10 15:04:37作者: ccc_zdh
imxrt1052的ram默认配置是256k ocram，128k DTCRAM ,128K ITCRAM
现在修改为128K OCRAM 256K DTCRAM 128K ITCRAM
1.首先修改启动文件，
Reset_Handler:
cpsid i /* Mask interrupts */
/*memory config 只有16种配置，不能随意配置
;IOMUX_GPR17 = 0B 0101 1010 1010 1111 1111 1010 1010 0101 0x5aaffaa5
; O O D D D D I I I I D D D D O O
; O: OCRAM D: DTCRAM I: ITCRAM
; OCRAM 4*32K = 128K DTCRAM 8*32K = 256K ICRAM 4*32K=128K */
LDR R0, =0x400AC044/*IOMUX_GPR17*/
LDR R1, =0x5AAFFAA5/*CONFIG FLEXRAM*/
STR R1, [R0]
/*
;IOMUX_GPR14 |= (8<<16)|(9<<20);
;设置ram大小 ITCRAM 128K DTCRAM 256K
*/
LDR R0, =0x400AC038/*IOMUX_GPR14*/
/*IOMUX_GPR14 = IOMUX_GPR14 & 0X00FFFF*/
LDR R2,[R0]
LDR R3, =0X00FFFF
AND R1,R2,R3
STR R1,[R0]
/* 10:512K 9: 256K 8:128K 7:64K 6:32K 5:16K 4:8K 3:4K 0:0K */
LDR R1, =0X08
MOV R2,R1,LSL#16 /* 0X08 << 16 ITCRAM*/
/* 10:512K 9: 256K 8:128K 7:64K 6:32K 5:16K 4:8K 3:4K 0:0K */
LDR R1, =0X09
MOV R3,R1,LSL#20 /* 0X09 << 20 DTCRAM*/
ORR R1,R2,R3
LDR R2,[R0]
ORR R1,R1,R2
STR R1, [R0]
/*IOMUX_GPR16 |= 0X07*/
LDR R0, =0x400AC040
LDR R1,[R0]
ORR R1,R1,#0X07 /*ENABLE FLEXRAM */
STR R1, [R0]
/*end memory config*/
.equ VTOR, 0xE000ED08
ldr r0, =VTOR
ldr r1, =__Vectors
str r1, [r0]
ldr r2, [r1]
msr msp, r2
ldr r0,=SystemInit
blx r0
cpsie i /* Unmask interrupts */
ldr r0,=__main
bx r0
2.修改链接文件
#define m_itcram_start 0x00000000
#define m_itcram_size 0x00020000
#define m_dtcram_start 0x20000000
#define m_dtcram_size 0x00040000
#define m_ocram_start 0x20200000
#define m_ocram_size 0x00020000